Quantum–HPC Workflow Explorer
Hybrid orchestration patterns • costs • bottlenecks

Explore how hybrid HPC↔QPU workflows behave under real bottlenecks

The near-term reality: classical work scales; QPU access is typically serialized/queued. This site is a prototype entry point: learn via simulations, then parameterize and “run” a model.

What you’ll see
Queueing, barriers, latency walls, idle/blocked time
What you’ll tweak
job size, batching, latency, queue time, sync frequency
What you’ll estimate
total time, utilization, and costs (HPC + QPU)

1) Simulations

Guided examples for common orchestration failure modes and patterns.

Open simulations

2) Build your application

Choose a template (e.g., VQE / SQD) and define a parameter profile.

Open builder

3) Run (model + dashboard)

Diagram + LEDs + counters. Edit parameters and see outcomes change.

Open runner

4) References

Docs, tutorials, IBM/Qiskit resources, and articles.

Open references